Eudes Prado Lopes Filho

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Produções bibliográficas

• PRADO LOPES FILHO, EUDES . ALLIGATOR: A FPGA Synthesis Tool. In: Anais do Congresso da Sociedade Brasileira de Microeletronica, 1995, Canela - RS. Congresso da Sociedade Brasileira de Microeletronica, 1995.

• PRADO LOPES FILHO, EUDES . A Delay Optiization Method Limiting the routing Area Increase. In: VII Brazilian Symposium of Integrated Circuits - SBCCI 94´, 1994, Gramado. Proceedings of VII Brazilian Symposium of Integrated Circuits, 1994.

• PRADO LOPES FILHO, EUDES . A Consistent Approach in Logic Synthesis for FPGA Achitectures. In: International Conference on ASIC, 1994, Pekin. Proceedings of the International Conference on ASIC - Beijing - 1994, 1994.

• LOPES FILHO, E. P. . FPGA Synthesis Based on ROBDD Representation. In: International Conference on Microelectronics, 1994, Istambul. Proceedings of the International Conference on Microelectronics, 1994.

• BURGUN, L. ; PRADO LOPES FILHO, EUDES . Multilevel Logic Optimization of Very High Complexity Circuits. In: EURO-DAC 94, 1994, Grenoble, France. Proceedings of EURO-DAC 94´, 1994.

• SARWARY, S. ; PRADO LOPES FILHO, EUDES . FSM Synthesis on FPGA Architectures. In: IEEE International ASIC Conference, 1994, Rochester, NY, USA. Proceedings of the IEEE International ASIC Conference, 1994.

• DICTUS, N. ; PRADO LOPES FILHO, EUDES . LAX: Logic Assistant under X. In: Congresso da Sociedade Brasileira de Microeletronica, 1994, Rio de Janeiro. Proceedings of the Brazilan Microelectronics Society, 1994.

• PRADO LOPES FILHO, EUDES . Silence: A Multilevel Logic Synthesis Tool. In: Congresso da Sociedade Brasileira de Microeletronica, 1994, Rio de Janeiro. Proceedings of the Brazilan Microelectronics Society, 1994.

• BURGUN, L. ; PRADO LOPES FILHO, EUDES . Evaluation&Improvements of Don't Care Minimization Techniques for Multi-ROBDD Representation. In: Congresso da Sociedade Brasileira de Microeletronica, 1994, Rio de Janeiro. Proceedings of the Brazilan Microelectronics Society, 1994.

• SARWARY, S. ; LOPES FILHO, E. P. . A Unified Approach for FSM Synthesis on FPGA Architectures. In: Euromicro 94´, 1994, Liverpook, UK. Proceedings of Euromicro 94´, 1994.

• AUDE, J. S. ; PRADO LOPES FILHO, EUDES . Arco: A Cost-Effective and Flexible Hardware Maze Router. In: Euromicro 93´, 1993, Barcelona. Proceedings of Euromicro 93´, 1993.

• PRADO LOPES FILHO, EUDES ; SANTOS, C. M. P. . Multilevel Logic Synthesis Based on Ordered and Reduced Binary Decisions Diagrams. In: Congresso da Sociedade Brasileira de Microeletronica, 1993, Campinas. Proceedings of the Brazilan Microelectronics Society, 1993.

• SARWARY, S. ; PRADO LOPES FILHO, EUDES . SYF : A FSM Synthesizer Using Stack. In: Congresso da Sociedade Brasileira de Microeletronica, 1993, Campinas. Proceedings of the Brazilan Microelectronics Society, 1993.

• PRADO LOPES FILHO, EUDES . Applied Chip Finishing - CMOS090 -CMOS120 test cases Philips World-Wide Technology Conference - WWTC - Paris, November ? 2005. 2005. (Apresentação de Trabalho/Congresso).

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