Mario Andrés Raffo Jara

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Produções bibliográficas

• RAFFO, M. ; Jonas Gomes Filho ; Strum, M. ; Wang, J.C. . DYNOPLACE: Herramienta para Automatización del Posicionamiento de Módulos en Sistemas Dinámicamente Reconfigurables.. Revista Electro Electrônica, p. 34 - 42, 29 ago. 2011.

• RAFFO, M. ; Strum, M. ; Wang, J.C. . SIMULACIÓN DE SISTEMAS DINAMICAMENTE RECONFIGURABLES IMPLEMENTADOS EN FPGAS. Revista Electro Electrônica, PUC do Peru, , v. 33, p. 45 - 52, 19 abr. 2010.

• PLASENCIA-BALABARCA, FRANK ; MITACC-MEZA, EDWARD ; Raffo-Jara, Mario ; SILVA-CARDENAS, CARLOS . Alternative functional verification methodology for low and medium level designs (Applied to an AES encryption module). In: 2018 IEEE 19th LatinAmerican Test Symposium (LATS), 2018, Sao Paulo. 2018 IEEE 19th Latin-American Test Symposium (LATS), 2018. p. 1.

• Cano, C. ; JARA, MARIO RAFFO ; RAFFO, M. . Arquitetura de alta frequencia de um filtro de escalabilidade para sobre amostragem de imagens em fator 2 para fpga. In: XIX Workshop IBERCHIP, 2013, Cusco. XIX Workshop IBERCHIP, 2013.

• CASTILLO, ERNESTO VILLEGAS ; CARDENAS, CARLOS SILVA ; JARA, MARIO RAFFO . An efficient hardware architecture of the H.264/AVC Half and Quarter-Pixel Motion Estimation for real-time High-Definition Video streams. In: 2012 IEEE 3rd Latin American Symposium on Circuits and Systems (LASCAS), 2012, Playa del Carmen. 2012 IEEE 3rd Latin American Symposium on Circuits and Systems (LASCAS), 2012. p. 1-4.

• Cristopher Villegas ; RAFFO, M. ; SILVA, C. . A Fractional Motion Estimation Hardware Architecture with Quarter-Pixel Accuaracy according to H.264/AVC for HDTV video sequences at real-time processing. In: Conference on Electronics, Telecommunications and Computers - CETC, 2011, Lisboa. A Fractional Motion Estimation Hardware Architecture with Quarter-Pixel Accuaracy according to H.264/AVC for HDTV video sequences at real-time processing, 2011.

• RAFFO, M. ; Jonas Gomes Filho ; Strum, M. ; Wang, J.C. . A Placement Tool for a NoC-Based Dynamically Reconfigurable System.. In: Southern Programmable Logic Conference, 2010, Ipojuca. Proceedings of the VI Southern Programmable Logic Conference, 2010. p. 47-52.

• Gomes Filho, J. ; RAFFO, M. ; Strum, M. ; Wang, J.C. . A General-Purpose Dynamically Reconfigurable SVM. In: Southern Programmable Logic Conference, 2010, Ipojuca. Proceedings of the VI Southern Programmable Logic Conference, 2010.

• RAFFO, M. ; Strum, M. ; Wang, J.C. . A Simulation Methodology for a NoC-Based Dynamically Reconfigurable System. In: XVI Workshop Iberchip, 2010, Foz do Iguaçú. Proceedings of XVI Workshop Iberchip, 2010.

• MONGE, M. ; RAFFO, M. ; SILVA, C. . DISEÑO DE UNA ARQUITECTURA PARA LA IMPLEMENTACION DE UNA RED NEURONAL ARTIFICIAL PERCEPTRON MULTICAPA SOBRE UN FPGA. In: XIV WORKSHOP IBERCHIP, 2008, PUEBLA. XIV WORKSHOP IBERCHIP, 2008.

• ROBLES, O. ; MUNOZ, J. ; RAFFO, M. . Desing and Synthesis of an Improved Mitchell-Based Logarithmic Converter for a Floating Point Coprocessor. In: XIV WORSHOP IBERCHIP, 2008, PUEBLA. XIV WORSHOP IBERCHIP, 2008.

• QUENTA, J. ; RAFFO, M. ; MUNOZ, J. . DISEÑO E IMPLEMENTACION DEL ANTILOGARITMO PARA UN COPROCESADOR MATEMATICO DE PUNTO FLOTANTE. In: XIV WORKSHOP IBERCHIP, 2008, PUEBLA. XIV WORKSHOP IBERCHIP, 2008.

• RAFFO, M. ; SILVA, C. ; IPARRAGUIRRE, D. . SISTEMA FLEXIBLE DE MULTIPROCESADORES ORIENTADO A TRATAMIENTO DE IMÁGENES. In: XIII WORKSHOP IBERCHIP, 2007, LIMA. XIII WORKSHOP IBERCHIP. LIMA: HOZLO S.R.L., 2007.

• RAFFO, M. ; SILVA, C. . Flexible Multiprocessing System Aimed Towards Image Processing. In: Escuela Argentina de Microelectrónica, Tecnología y Aplicaciones, 2007, Cordoba. EAMTA2007, 2007.

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